(a) Field of the Invention
The present invention relates to an analog-to-digital converter digital.
(b) Description of the Related Art
An analog-to-digital converter (hereinafter, referred to as an “ADC”) that converts an analog signal into a digital signal is widely used in various electronic devices such as display devices, computers, home appliances, and communication systems. The ADC is becoming more important for image signal processing applications as multimedia services become popular.
As one example of an ADC, a flash ADC having a structure suitable for high-speed processing converts an analog input signal into a digital signal by comparing the level of an analog input voltage corresponding to the analog input signal with the level of a reference voltage divided by resistors, latching the outputs of the respective comparators, and encoding them. Such an ADC requires 2n resistors, 2n−1 comparators, and 2n−1 latches for an n-bit digital output. Since the number of comparators needed for an n-bit resolution increases in proportion to 2n exponential functions, increase in area and power consumption of an ADC requiring high resolution is disadvantageously caused by a large number of comparators.
Another example of an ADC includes an ADC using an interpolation technique to reduce the number of comparators exponentially increasing with increase in the number of digital output bits.
FIG. 1 is a view showing a conventional interpolating flash ADC.
Referring to FIG. 1, the interpolating flash ADC comprises an intermediate latch 20m which are interposed between two latches 201 and 202 receiving differential output signals of two comparators 101 and 102 amplifying differences between an analog input voltage and reference voltages V1 and V2, and receive the differential output signals of the two comparators 101 and 102. That is, the differential output signals of the two comparators 101 and 102 are used as an input to the intermediate latch 20m. As such, by using the differential output signals of the two comparators 101 and 102 as an input to the intermediate latch 30m, a new intermediate reference voltage {Vm=(V1+V2/2)} between the reference voltages V1 and V2 is generated. That is, the intermediate latch 30m is able to latch a signal zero-crossing at the intermediate reference voltage Vm even without a comparator for amplifying and outputting a difference between the intermediate reference voltage Vm and the analog input voltage.
As a result, using this interpolation technique, the same resolution as the aforementioned flash ADC can be realized while reducing the number of comparators. However, comparators have static current allowed to flow by a bias current source. Accordingly, a reduction in the number of comparators is still accompanied by high power consumption.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.